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| author | David Gibson | 2011-04-01 06:15:08 +0200 |
|---|---|---|
| committer | Alexander Graf | 2011-04-01 18:34:54 +0200 |
| commit | 81762d6dd0d430d87024f2c83e9c4dcc4329fb7d (patch) | |
| tree | bd081fa7949a578cc91b6aba958cf14a78c108a8 /target-ppc/helper.h | |
| parent | target-ppc: ext32u instead of andi with constant (diff) | |
| download | qemu-81762d6dd0d430d87024f2c83e9c4dcc4329fb7d.tar.gz qemu-81762d6dd0d430d87024f2c83e9c4dcc4329fb7d.tar.xz qemu-81762d6dd0d430d87024f2c83e9c4dcc4329fb7d.zip | |
Clean up PowerPC SLB handling code
Currently the SLB information when emulating a PowerPC 970 is
storeed in a structure with the unhelpfully named fields 'tmp'
and 'tmp64'. While the layout in these fields does match the
description of the SLB in the architecture document, it is not
convenient either for looking up the SLB, or for emulating the
slbmte instruction.
This patch, therefore, reorganizes the SLB entry structure to be
divided in the the "ESID related" and "VSID related" fields as
they are divided in instructions accessing the SLB.
In addition to making the code smaller and more readable, this will
make it easier to implement for the 1TB segments used in more
recent PowerPC chips.
Signed-off-by: David Gibson <dwg@au1.ibm.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
Diffstat (limited to 'target-ppc/helper.h')
| -rw-r--r-- | target-ppc/helper.h | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/target-ppc/helper.h b/target-ppc/helper.h index 2bf9283486..d512cb00e2 100644 --- a/target-ppc/helper.h +++ b/target-ppc/helper.h @@ -340,7 +340,6 @@ DEF_HELPER_1(74xx_tlbi, void, tl) DEF_HELPER_FLAGS_0(tlbia, TCG_CALL_CONST, void) DEF_HELPER_FLAGS_1(tlbie, TCG_CALL_CONST, void, tl) #if defined(TARGET_PPC64) -DEF_HELPER_FLAGS_1(load_slb, TCG_CALL_CONST, tl, tl) DEF_HELPER_FLAGS_2(store_slb, TCG_CALL_CONST, void, tl, tl) DEF_HELPER_FLAGS_0(slbia, TCG_CALL_CONST, void) DEF_HELPER_FLAGS_1(slbie, TCG_CALL_CONST, void, tl) |