diff options
| author | Avi Kivity | 2012-10-04 12:36:04 +0200 |
|---|---|---|
| committer | Anthony Liguori | 2012-10-05 02:46:18 +0200 |
| commit | 4be403c8158e1b6be743f0fef004310cea4e3975 (patch) | |
| tree | 3f5282792a3da1214dfb4eb29aaa3004627604a6 /target-ppc/mmu_helper.c | |
| parent | fpu/softfloat.c: Return correctly signed values from uint64_to_float32 (diff) | |
| download | qemu-4be403c8158e1b6be743f0fef004310cea4e3975.tar.gz qemu-4be403c8158e1b6be743f0fef004310cea4e3975.tar.xz qemu-4be403c8158e1b6be743f0fef004310cea4e3975.zip | |
Make target_phys_addr_t 64 bits unconditionally
The hassle and compile time overhead of maintaining both 32-bit and 64-bit
capable source isn't worth the tiny performance advantage which is seen on
a minority of configurations. Switch to compiling libhw only once, with
target_phys_addr_t unconditionally typedefed to uint64_t.
Signed-off-by: Avi Kivity <avi@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Diffstat (limited to 'target-ppc/mmu_helper.c')
| -rw-r--r-- | target-ppc/mmu_helper.c | 4 |
1 files changed, 1 insertions, 3 deletions
diff --git a/target-ppc/mmu_helper.c b/target-ppc/mmu_helper.c index d2664acef0..532b114aed 100644 --- a/target-ppc/mmu_helper.c +++ b/target-ppc/mmu_helper.c @@ -1032,12 +1032,10 @@ static int ppcemb_tlb_check(CPUPPCState *env, ppcemb_tlb_t *tlb, return -1; } *raddrp = (tlb->RPN & mask) | (address & ~mask); -#if (TARGET_PHYS_ADDR_BITS >= 36) if (ext) { /* Extend the physical address to 36 bits */ - *raddrp |= (target_phys_addr_t)(tlb->RPN & 0xF) << 32; + *raddrp |= (uint64_t)(tlb->RPN & 0xF) << 32; } -#endif return 0; } |