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authorBenjamin Herrenschmidt2016-06-27 08:55:21 +0200
committerDavid Gibson2016-07-01 01:57:01 +0200
commitf2b70fded9b32c4b9e45e5b7f11bfc2ef961ede7 (patch)
treead36f740f0f52118b9b7196b6ccd84e275979d4b /target-ppc/translate.c
parentppc: LPCR is a HV resource (diff)
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ppc: Print HSRR0/HSRR1 in "info registers"
They are generally useful when debugging HV mode stuff Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> [clg: fixed checkpatch.pl errors ] Signed-off-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'target-ppc/translate.c')
-rw-r--r--target-ppc/translate.c7
1 files changed, 7 insertions, 0 deletions
diff --git a/target-ppc/translate.c b/target-ppc/translate.c
index 2f1c59166e..49fe761407 100644
--- a/target-ppc/translate.c
+++ b/target-ppc/translate.c
@@ -11407,6 +11407,13 @@ void ppc_cpu_dump_state(CPUState *cs, FILE *f, fprintf_function cpu_fprintf,
env->spr[SPR_SPRG4], env->spr[SPR_SPRG5],
env->spr[SPR_SPRG6], env->spr[SPR_SPRG7]);
+#if defined(TARGET_PPC64)
+ if (env->excp_model == POWERPC_EXCP_POWER7 ||
+ env->excp_model == POWERPC_EXCP_POWER8) {
+ cpu_fprintf(f, "HSRR0 " TARGET_FMT_lx " HSRR1 " TARGET_FMT_lx "\n",
+ env->spr[SPR_HSRR0], env->spr[SPR_HSRR1]);
+ }
+#endif
if (env->excp_model == POWERPC_EXCP_BOOKE) {
cpu_fprintf(f, "CSRR0 " TARGET_FMT_lx " CSRR1 " TARGET_FMT_lx
" MCSRR0 " TARGET_FMT_lx " MCSRR1 " TARGET_FMT_lx "\n",