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| author | Veres Lajos | 2015-09-08 23:45:14 +0200 |
|---|---|---|
| committer | Michael Tokarev | 2015-09-11 09:45:43 +0200 |
| commit | 67cc32ebfd8c0ee3fcdb26780a8991baf5eb1d45 (patch) | |
| tree | 86bc6be6682ce785667cef755e1b630e317ad696 /target-sh4 | |
| parent | qapi-schema: remove legacy<> from doc (diff) | |
| download | qemu-67cc32ebfd8c0ee3fcdb26780a8991baf5eb1d45.tar.gz qemu-67cc32ebfd8c0ee3fcdb26780a8991baf5eb1d45.tar.xz qemu-67cc32ebfd8c0ee3fcdb26780a8991baf5eb1d45.zip | |
typofixes - v4
Signed-off-by: Veres Lajos <vlajos@gmail.com>
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
Diffstat (limited to 'target-sh4')
| -rw-r--r-- | target-sh4/helper.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/target-sh4/helper.c b/target-sh4/helper.c index dc101cb3a4..eaececd894 100644 --- a/target-sh4/helper.c +++ b/target-sh4/helper.c @@ -59,7 +59,7 @@ int superh_cpu_handle_mmu_fault(CPUState *cs, vaddr address, int rw, int cpu_sh4_is_cached(CPUSH4State * env, target_ulong addr) { - /* For user mode, only U0 area is cachable. */ + /* For user mode, only U0 area is cacheable. */ return !(addr & 0x80000000); } @@ -825,11 +825,11 @@ int cpu_sh4_is_cached(CPUSH4State * env, target_ulong addr) /* check area */ if (env->sr & (1u << SR_MD)) { - /* For previledged mode, P2 and P4 area is not cachable. */ + /* For privileged mode, P2 and P4 area is not cacheable. */ if ((0xA0000000 <= addr && addr < 0xC0000000) || 0xE0000000 <= addr) return 0; } else { - /* For user mode, only U0 area is cachable. */ + /* For user mode, only U0 area is cacheable. */ if (0x80000000 <= addr) return 0; } |