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| author | blueswir1 | 2008-06-07 10:07:37 +0200 |
|---|---|---|
| committer | blueswir1 | 2008-06-07 10:07:37 +0200 |
| commit | 1a14026e11b9baaf5050b0bed947e1b57f10ca08 (patch) | |
| tree | a06201cc70543831d6f593414d910f0c80e083a2 /target-sparc/TODO | |
| parent | Fix Sparc32plus GDBstub support (diff) | |
| download | qemu-1a14026e11b9baaf5050b0bed947e1b57f10ca08.tar.gz qemu-1a14026e11b9baaf5050b0bed947e1b57f10ca08.tar.xz qemu-1a14026e11b9baaf5050b0bed947e1b57f10ca08.zip | |
Allow NWINDOWS selection (CPU feature with model specific defaults)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4690 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-sparc/TODO')
| -rw-r--r-- | target-sparc/TODO | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/target-sparc/TODO b/target-sparc/TODO index 5a4937ba0d..0e998e276c 100644 --- a/target-sparc/TODO +++ b/target-sparc/TODO @@ -6,7 +6,6 @@ CPU common: slot next page) - Atomical instructions - CPU features should match real CPUs (also ASI selection) - - Allow choosing of NWINDOWS (CPU model specific and as a CPU feature) - Optimizations/improvements: - Condition code/branch handling like x86, also for FPU? - Remove remaining explicit alignment checks |