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| author | blueswir1 | 2008-03-18 19:09:27 +0100 |
|---|---|---|
| committer | blueswir1 | 2008-03-18 19:09:27 +0100 |
| commit | 2483386a6e77b7e480e8019bd1250694f146bdb1 (patch) | |
| tree | 35b4bfcec1e67742759183fc4b4a99813b6fc2c9 /target-sparc | |
| parent | Convert CCR and CWP ops to TCG (diff) | |
| download | qemu-2483386a6e77b7e480e8019bd1250694f146bdb1.tar.gz qemu-2483386a6e77b7e480e8019bd1250694f146bdb1.tar.xz qemu-2483386a6e77b7e480e8019bd1250694f146bdb1.zip | |
Use ext_i32_i64 instead of ext32s_i64
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4087 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-sparc')
| -rw-r--r-- | target-sparc/translate.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/target-sparc/translate.c b/target-sparc/translate.c index fce4de086d..5d87ef8d5d 100644 --- a/target-sparc/translate.c +++ b/target-sparc/translate.c @@ -790,8 +790,8 @@ static inline void gen_op_smul_T1_T0(void) r_temp = tcg_temp_new(TCG_TYPE_I64); r_temp2 = tcg_temp_new(TCG_TYPE_I64); - tcg_gen_ext32s_i64(r_temp, cpu_T[1]); - tcg_gen_ext32s_i64(r_temp2, cpu_T[0]); + tcg_gen_ext_i32_i64(r_temp, cpu_T[1]); + tcg_gen_ext_i32_i64(r_temp2, cpu_T[0]); tcg_gen_mul_i64(r_temp2, r_temp, r_temp2); tcg_gen_shri_i64(r_temp, r_temp2, 32); |