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author | Richard Henderson | 2015-08-21 20:49:38 +0200 |
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committer | Richard Henderson | 2015-09-15 16:45:28 +0200 |
commit | 9b9dc7aceca411f1fb69d5426e5e88dd204813ed (patch) | |
tree | 12f4a1441ffb558a2029e6a15ac3c9f18265eb01 /target-tilegx | |
parent | target-tilegx: Framework for decoding bundles (diff) | |
download | qemu-9b9dc7aceca411f1fb69d5426e5e88dd204813ed.tar.gz qemu-9b9dc7aceca411f1fb69d5426e5e88dd204813ed.tar.xz qemu-9b9dc7aceca411f1fb69d5426e5e88dd204813ed.zip |
target-tilegx: Generate SEGV properly
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Diffstat (limited to 'target-tilegx')
-rw-r--r-- | target-tilegx/cpu.c | 5 | ||||
-rw-r--r-- | target-tilegx/cpu.h | 2 |
2 files changed, 6 insertions, 1 deletions
diff --git a/target-tilegx/cpu.c b/target-tilegx/cpu.c index 87aee248b4..78b73e45c4 100644 --- a/target-tilegx/cpu.c +++ b/target-tilegx/cpu.c @@ -119,7 +119,10 @@ static void tilegx_cpu_do_interrupt(CPUState *cs) static int tilegx_cpu_handle_mmu_fault(CPUState *cs, vaddr address, int rw, int mmu_idx) { - cpu_dump_state(cs, stderr, fprintf, 0); + TileGXCPU *cpu = TILEGX_CPU(cs); + + cs->exception_index = TILEGX_EXCP_SEGV; + cpu->env.excaddr = address; return 1; } diff --git a/target-tilegx/cpu.h b/target-tilegx/cpu.h index 2c86cd3890..3a62d20106 100644 --- a/target-tilegx/cpu.h +++ b/target-tilegx/cpu.h @@ -60,6 +60,7 @@ enum { typedef enum { TILEGX_EXCP_NONE = 0, TILEGX_EXCP_SYSCALL = 1, + TILEGX_EXCP_SEGV = 2, TILEGX_EXCP_OPCODE_UNKNOWN = 0x101, TILEGX_EXCP_OPCODE_UNIMPLEMENTED = 0x102, TILEGX_EXCP_OPCODE_CMPEXCH = 0x103, @@ -87,6 +88,7 @@ typedef struct CPUTLGState { #if defined(CONFIG_USER_ONLY) uint32_t excparam; /* exception parameter */ + uint64_t excaddr; /* exception address */ #endif CPU_COMMON |