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| author | Bastian Koppelmann | 2014-10-23 13:18:02 +0200 |
|---|---|---|
| committer | Bastian Koppelmann | 2014-12-10 12:13:45 +0100 |
| commit | a68e0d547f042f1d75f4d56ca5b6c4cc719d7077 (patch) | |
| tree | d7f48ade6891be1d047e7dc6627e365def86de7f /target-tricore/tricore-opcodes.h | |
| parent | target-tricore: Add instructions of BRN opcode format (diff) | |
| download | qemu-a68e0d547f042f1d75f4d56ca5b6c4cc719d7077.tar.gz qemu-a68e0d547f042f1d75f4d56ca5b6c4cc719d7077.tar.xz qemu-a68e0d547f042f1d75f4d56ca5b6c4cc719d7077.zip | |
target-tricore: Add instructions of BRR opcode format
Add instructions of BRR opcode format.
Add MASK_OP_BRR_DISP15_SEXT.
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Diffstat (limited to 'target-tricore/tricore-opcodes.h')
| -rw-r--r-- | target-tricore/tricore-opcodes.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/target-tricore/tricore-opcodes.h b/target-tricore/tricore-opcodes.h index 3622d388e2..7d35e3e04d 100644 --- a/target-tricore/tricore-opcodes.h +++ b/target-tricore/tricore-opcodes.h @@ -139,6 +139,7 @@ /* BRR Format */ #define MASK_OP_BRR_OP2(op) MASK_BITS_SHIFT(op, 31, 31) #define MASK_OP_BRR_DISP15(op) MASK_BITS_SHIFT(op, 16, 30) +#define MASK_OP_BRR_DISP15_SEXT(op) MASK_BITS_SHIFT_SEXT(op, 16, 30) #define MASK_OP_BRR_S2(op) MASK_BITS_SHIFT(op, 12, 15) #define MASK_OP_BRR_S1(op) MASK_BITS_SHIFT(op, 8, 11) |