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| author | Max Filippov | 2012-04-15 23:47:06 +0200 |
|---|---|---|
| committer | Blue Swirl | 2012-04-21 15:24:45 +0200 |
| commit | b18b37f7c5bc96dabdb08bcfb699b339a76104bf (patch) | |
| tree | 67842adbc717da793baa5b143c23c7c68ff111a8 /target-xtensa | |
| parent | qtest: add m48t59 tests for Sparc (diff) | |
| download | qemu-b18b37f7c5bc96dabdb08bcfb699b339a76104bf.tar.gz qemu-b18b37f7c5bc96dabdb08bcfb699b339a76104bf.tar.xz qemu-b18b37f7c5bc96dabdb08bcfb699b339a76104bf.zip | |
target-xtensa: fix LOOPNEZ/LOOPGTZ translation
Translation of LOOP instructions used to call LEND SR write handler to
update LEND and invalidate relevant TBs. Now that LEND SR write handler
ends TB, LOOPNEZ and LOOPGTZ generate wrong code (same as for simple
LOOP). Fix it by calling wsr_lend helper directly.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Diffstat (limited to 'target-xtensa')
| -rw-r--r-- | target-xtensa/translate.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/target-xtensa/translate.c b/target-xtensa/translate.c index 6900123983..521c0e6226 100644 --- a/target-xtensa/translate.c +++ b/target-xtensa/translate.c @@ -2278,7 +2278,7 @@ static void disas_xtensa_insn(DisasContext *dc) tcg_gen_subi_i32(cpu_SR[LCOUNT], cpu_R[RRI8_S], 1); tcg_gen_movi_i32(cpu_SR[LBEG], dc->next_pc); - gen_wsr_lend(dc, LEND, tmp); + gen_helper_wsr_lend(tmp); tcg_temp_free(tmp); if (BRI8_R > 8) { |