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author | Peter Maydell | 2021-07-12 12:02:38 +0200 |
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committer | Peter Maydell | 2021-07-12 12:02:39 +0200 |
commit | bd38ae26cea0d1d6a97f930248df149204c210a2 (patch) | |
tree | 88e13c944344969970bd1f0dfb1cab2a7a2849ee /target/alpha | |
parent | Merge remote-tracking branch 'remotes/bonzini-gitlab/tags/for-upstream' into ... (diff) | |
parent | cpu: Add breakpoint tracepoints (diff) | |
download | qemu-bd38ae26cea0d1d6a97f930248df149204c210a2.tar.gz qemu-bd38ae26cea0d1d6a97f930248df149204c210a2.tar.xz qemu-bd38ae26cea0d1d6a97f930248df149204c210a2.zip |
Merge remote-tracking branch 'remotes/rth-gitlab/tags/pull-tcg-20210710' into staging
Add translator_use_goto_tb.
Cleanups in prep of breakpoint fixes.
Misc fixes.
# gpg: Signature made Sat 10 Jul 2021 16:29:14 BST
# gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F
# gpg: issuer "richard.henderson@linaro.org"
# gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full]
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* remotes/rth-gitlab/tags/pull-tcg-20210710: (41 commits)
cpu: Add breakpoint tracepoints
tcg: Remove TCG_TARGET_HAS_goto_ptr
accel/tcg: Log tb->cflags with -d exec
accel/tcg: Split out log_cpu_exec
accel/tcg: Move tb_lookup to cpu-exec.c
accel/tcg: Move helper_lookup_tb_ptr to cpu-exec.c
target/i386: Use cpu_breakpoint_test in breakpoint_handler
tcg: Fix prologue disassembly
target/xtensa: Use translator_use_goto_tb
target/tricore: Use tcg_gen_lookup_and_goto_ptr
target/tricore: Use translator_use_goto_tb
target/sparc: Use translator_use_goto_tb
target/sh4: Use translator_use_goto_tb
target/s390x: Remove use_exit_tb
target/s390x: Use translator_use_goto_tb
target/rx: Use translator_use_goto_tb
target/riscv: Use translator_use_goto_tb
target/ppc: Use translator_use_goto_tb
target/openrisc: Use translator_use_goto_tb
target/nios2: Use translator_use_goto_tb
...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target/alpha')
-rw-r--r-- | target/alpha/translate.c | 47 |
1 files changed, 5 insertions, 42 deletions
diff --git a/target/alpha/translate.c b/target/alpha/translate.c index f2922f5f8c..833d3baa7b 100644 --- a/target/alpha/translate.c +++ b/target/alpha/translate.c @@ -28,7 +28,6 @@ #include "exec/cpu_ldst.h" #include "exec/helper-proto.h" #include "exec/helper-gen.h" -#include "trace-tcg.h" #include "exec/translator.h" #include "exec/log.h" @@ -439,40 +438,9 @@ static DisasJumpType gen_store_conditional(DisasContext *ctx, int ra, int rb, return DISAS_NEXT; } -static bool in_superpage(DisasContext *ctx, int64_t addr) -{ -#ifndef CONFIG_USER_ONLY - return ((ctx->tbflags & ENV_FLAG_PS_USER) == 0 - && addr >> TARGET_VIRT_ADDR_SPACE_BITS == -1 - && ((addr >> 41) & 3) == 2); -#else - return false; -#endif -} - -static bool use_exit_tb(DisasContext *ctx) -{ - return ((tb_cflags(ctx->base.tb) & CF_LAST_IO) - || ctx->base.singlestep_enabled - || singlestep); -} - static bool use_goto_tb(DisasContext *ctx, uint64_t dest) { - /* Suppress goto_tb in the case of single-steping and IO. */ - if (unlikely(use_exit_tb(ctx))) { - return false; - } -#ifndef CONFIG_USER_ONLY - /* If the destination is in the superpage, the page perms can't change. */ - if (in_superpage(ctx, dest)) { - return true; - } - /* Check for the dest on the same page as the start of the TB. */ - return ((ctx->base.tb->pc ^ dest) & TARGET_PAGE_MASK) == 0; -#else - return true; -#endif + return translator_use_goto_tb(&ctx->base, dest); } static DisasJumpType gen_bdirect(DisasContext *ctx, int ra, int32_t disp) @@ -1271,7 +1239,7 @@ static DisasJumpType gen_call_pal(DisasContext *ctx, int palcode) need the page permissions check. We'll see the existence of the page when we create the TB, and we'll flush all TBs if we change the PAL base register. */ - if (!use_exit_tb(ctx)) { + if (!ctx->base.singlestep_enabled) { tcg_gen_goto_tb(0); tcg_gen_movi_i64(cpu_pc, entry); tcg_gen_exit_tb(ctx->base.tb, 0); @@ -3002,7 +2970,7 @@ static void alpha_tr_init_disas_context(DisasContextBase *dcbase, CPUState *cpu) { DisasContext *ctx = container_of(dcbase, DisasContext, base); CPUAlphaState *env = cpu->env_ptr; - int64_t bound, mask; + int64_t bound; ctx->tbflags = ctx->base.tb->flags; ctx->mem_idx = cpu_mmu_index(env, false); @@ -3031,12 +2999,7 @@ static void alpha_tr_init_disas_context(DisasContextBase *dcbase, CPUState *cpu) ctx->lit = NULL; /* Bound the number of insns to execute to those left on the page. */ - if (in_superpage(ctx, ctx->base.pc_first)) { - mask = -1ULL << 41; - } else { - mask = TARGET_PAGE_MASK; - } - bound = -(ctx->base.pc_first | mask) / 4; + bound = -(ctx->base.pc_first | TARGET_PAGE_MASK) / 4; ctx->base.max_insns = MIN(ctx->base.max_insns, bound); } @@ -3095,7 +3058,7 @@ static void alpha_tr_tb_stop(DisasContextBase *dcbase, CPUState *cpu) tcg_gen_movi_i64(cpu_pc, ctx->base.pc_next); /* FALLTHRU */ case DISAS_PC_UPDATED: - if (!use_exit_tb(ctx)) { + if (!ctx->base.singlestep_enabled) { tcg_gen_lookup_and_goto_ptr(); break; } |