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| author | Richard Henderson | 2019-09-04 21:30:24 +0200 |
|---|---|---|
| committer | Peter Maydell | 2019-09-05 14:23:03 +0200 |
| commit | 885782a78c6d05932c5d8f463dc50fc8312e3eb9 (patch) | |
| tree | f546e3bc16fd49465f69e8707099bfeb0482c751 /target/arm/a32-uncond.decode | |
| parent | target/arm: Convert SVC (diff) | |
| download | qemu-885782a78c6d05932c5d8f463dc50fc8312e3eb9.tar.gz qemu-885782a78c6d05932c5d8f463dc50fc8312e3eb9.tar.xz qemu-885782a78c6d05932c5d8f463dc50fc8312e3eb9.zip | |
target/arm: Convert RFE and SRS
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20190904193059.26202-35-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target/arm/a32-uncond.decode')
| -rw-r--r-- | target/arm/a32-uncond.decode | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/target/arm/a32-uncond.decode b/target/arm/a32-uncond.decode index 573ac2cf8e..64548a93e2 100644 --- a/target/arm/a32-uncond.decode +++ b/target/arm/a32-uncond.decode @@ -29,3 +29,11 @@ %imm24h 0:s24 24:1 !function=times_2 BLX_i 1111 101 . ........................ &i imm=%imm24h + +# System Instructions + +&rfe rn w pu +&srs mode w pu + +RFE 1111 100 pu:2 0 w:1 1 rn:4 0000 1010 0000 0000 &rfe +SRS 1111 100 pu:2 1 w:1 0 1101 0000 0101 000 mode:5 &srs |