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| author | Richard Henderson | 2020-06-26 05:31:36 +0200 |
|---|---|---|
| committer | Peter Maydell | 2020-06-26 15:31:12 +0200 |
| commit | c4af8ba19b9d22aac79cab679a20b159af9d6809 (patch) | |
| tree | dc2e0d9d4724f2409a56a543f17f3a9072092d65 /target/arm/cpu.c | |
| parent | target/arm: Add mte helpers for sve scatter/gather memory ops (diff) | |
| download | qemu-c4af8ba19b9d22aac79cab679a20b159af9d6809.tar.gz qemu-c4af8ba19b9d22aac79cab679a20b159af9d6809.tar.xz qemu-c4af8ba19b9d22aac79cab679a20b159af9d6809.zip | |
target/arm: Complete TBI clearing for user-only for SVE
There are a number of paths by which the TBI is still intact
for user-only in the SVE helpers.
Because we currently always set TBI for user-only, we do not
need to pass down the actual TBI setting from above, and we
can remove the top byte in the inner-most primitives, so that
none are forgotten. Moreover, this keeps the "dirty" pointer
around at the higher levels, where we need it for any MTE checking.
Since the normal case, especially for user-only, goes through
RAM, this clearing merely adds two insns per page lookup, which
will be completely in the noise.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20200626033144.790098-39-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target/arm/cpu.c')
| -rw-r--r-- | target/arm/cpu.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/target/arm/cpu.c b/target/arm/cpu.c index d9876337c0..afe81e9b6c 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -203,6 +203,9 @@ static void arm_cpu_reset(DeviceState *dev) * Enable TBI0 and TBI1. While the real kernel only enables TBI0, * turning on both here will produce smaller code and otherwise * make no difference to the user-level emulation. + * + * In sve_probe_page, we assume that this is set. + * Do not modify this without other changes. */ env->cp15.tcr_el[1].raw_tcr = (3ULL << 37); #else |