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author | Richard Henderson | 2019-11-19 14:20:28 +0100 |
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committer | Peter Maydell | 2019-11-19 14:20:28 +0100 |
commit | 04c9c81b8fa2ee33f59a26265700fae6fc646062 (patch) | |
tree | 258a0e0cde71f440238c0e1c38706685117eefd7 /target/arm/cpu.h | |
parent | target/arm: Relax r13 restriction for ldrex/strex for v8.0 (diff) | |
download | qemu-04c9c81b8fa2ee33f59a26265700fae6fc646062.tar.gz qemu-04c9c81b8fa2ee33f59a26265700fae6fc646062.tar.xz qemu-04c9c81b8fa2ee33f59a26265700fae6fc646062.zip |
target/arm: Support EL0 v7m msr/mrs for CONFIG_USER_ONLY
Simply moving the non-stub helper_v7m_mrs/msr outside of
!CONFIG_USER_ONLY is not an option, because of all of the
other system-mode helpers that are called.
But we can split out a few subroutines to handle the few
EL0 accessible registers without duplicating code.
Reported-by: Christophe Lyon <christophe.lyon@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20191118194916.3670-1-richard.henderson@linaro.org
[PMM: deleted now-redundant comment; added a default case
to switch in v7m_msr helper]
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target/arm/cpu.h')
-rw-r--r-- | target/arm/cpu.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/target/arm/cpu.h b/target/arm/cpu.h index 47d24a5375..83a809d4ba 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -1314,6 +1314,7 @@ static inline void xpsr_write(CPUARMState *env, uint32_t val, uint32_t mask) if (mask & XPSR_GE) { env->GE = (val & XPSR_GE) >> 16; } +#ifndef CONFIG_USER_ONLY if (mask & XPSR_T) { env->thumb = ((val & XPSR_T) != 0); } @@ -1329,6 +1330,7 @@ static inline void xpsr_write(CPUARMState *env, uint32_t val, uint32_t mask) /* Note that this only happens on exception exit */ write_v7m_exception(env, val & XPSR_EXCP); } +#endif } #define HCR_VM (1ULL << 0) |