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author | Andrew Jones | 2017-09-04 16:21:53 +0200 |
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committer | Peter Maydell | 2017-09-04 16:21:53 +0200 |
commit | 07f48730bc4ec99f128901705336eb455f674694 (patch) | |
tree | 7ea09a03fad45b4945c4012fe98c0369da86b7e6 /target/arm/cpu.h | |
parent | hw/arm: use defined type name instead of hard-coded string (diff) | |
download | qemu-07f48730bc4ec99f128901705336eb455f674694.tar.gz qemu-07f48730bc4ec99f128901705336eb455f674694.tar.xz qemu-07f48730bc4ec99f128901705336eb455f674694.zip |
hw/arm/virt: add pmu interrupt state
Mimicking gicv3-maintenance-interrupt, add the PMU's interrupt to
CPU state.
Signed-off-by: Andrew Jones <drjones@redhat.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 1500471597-2517-2-git-send-email-drjones@redhat.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target/arm/cpu.h')
-rw-r--r-- | target/arm/cpu.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/target/arm/cpu.h b/target/arm/cpu.h index eabef00a34..92771d3790 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -585,6 +585,8 @@ struct ARMCPU { qemu_irq gt_timer_outputs[NUM_GTIMERS]; /* GPIO output for GICv3 maintenance interrupt signal */ qemu_irq gicv3_maintenance_interrupt; + /* GPIO output for the PMU interrupt */ + qemu_irq pmu_interrupt; /* MemoryRegion to use for secure physical accesses */ MemoryRegion *secure_memory; |