diff options
| author | Richard Henderson | 2019-01-21 11:23:11 +0100 |
|---|---|---|
| committer | Peter Maydell | 2019-01-21 11:38:53 +0100 |
| commit | 0816ef1bfcd3ac53e7454b62ca436727887f6056 (patch) | |
| tree | c4958a66887b28ddb38893af05e16ca2980dc947 /target/arm/cpu.h | |
| parent | target/arm: Add SCTLR bits through ARMv8.5 (diff) | |
| download | qemu-0816ef1bfcd3ac53e7454b62ca436727887f6056.tar.gz qemu-0816ef1bfcd3ac53e7454b62ca436727887f6056.tar.xz qemu-0816ef1bfcd3ac53e7454b62ca436727887f6056.zip | |
target/arm: Add PAuth active bit to tbflags
There are 5 bits of state that could be added, but to save
space within tbflags, add only a single enable bit.
Helpers will determine the rest of the state at runtime.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20190108223129.5570-4-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target/arm/cpu.h')
| -rw-r--r-- | target/arm/cpu.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/target/arm/cpu.h b/target/arm/cpu.h index a73d5ac197..2b83ab2685 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -3014,6 +3014,7 @@ FIELD(TBFLAG_A64, TBI0, 0, 1) FIELD(TBFLAG_A64, TBI1, 1, 1) FIELD(TBFLAG_A64, SVEEXC_EL, 2, 2) FIELD(TBFLAG_A64, ZCR_LEN, 4, 4) +FIELD(TBFLAG_A64, PAUTH_ACTIVE, 8, 1) static inline bool bswap_code(bool sctlr_b) { |