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| author | Richard Henderson | 2020-02-14 19:15:30 +0100 |
|---|---|---|
| committer | Peter Maydell | 2020-02-21 17:07:03 +0100 |
| commit | 0e13ba7889432c5e2f1bdb1b25e7076ca1b1dcba (patch) | |
| tree | ab59a66f61e2054b94a57c6da1ceeb19eb35d99d /target/arm/cpu.h | |
| parent | sh4: Fix PCI ISA IO memory subregion (diff) | |
| download | qemu-0e13ba7889432c5e2f1bdb1b25e7076ca1b1dcba.tar.gz qemu-0e13ba7889432c5e2f1bdb1b25e7076ca1b1dcba.tar.xz qemu-0e13ba7889432c5e2f1bdb1b25e7076ca1b1dcba.zip | |
target/arm: Rename isar_feature_aa32_simd_r32
The old name, isar_feature_aa32_fp_d32, does not reflect
the MVFR0 field name, SIMDReg.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-id: 20200214181547.21408-3-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
[PMM: wrapped one long line]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target/arm/cpu.h')
| -rw-r--r-- | target/arm/cpu.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/target/arm/cpu.h b/target/arm/cpu.h index b4c83a1cb5..65171cb30e 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -3450,7 +3450,7 @@ static inline bool isar_feature_aa32_fp16_arith(const ARMISARegisters *id) return FIELD_EX64(id->id_aa64pfr0, ID_AA64PFR0, FP) == 1; } -static inline bool isar_feature_aa32_fp_d32(const ARMISARegisters *id) +static inline bool isar_feature_aa32_simd_r32(const ARMISARegisters *id) { /* Return true if D16-D31 are implemented */ return FIELD_EX32(id->mvfr0, MVFR0, SIMDREG) >= 2; |