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author | Peter Maydell | 2020-02-14 18:51:06 +0100 |
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committer | Peter Maydell | 2020-02-21 17:07:01 +0100 |
commit | 4426d3617d64922d97b74ed22e67e33b6fb7de0a (patch) | |
tree | d25fd41f08c8d7008b2b337408916d077daafe70 /target/arm/cpu.h | |
parent | target/arm: Stop assuming DBGDIDR always exists (diff) | |
download | qemu-4426d3617d64922d97b74ed22e67e33b6fb7de0a.tar.gz qemu-4426d3617d64922d97b74ed22e67e33b6fb7de0a.tar.xz qemu-4426d3617d64922d97b74ed22e67e33b6fb7de0a.zip |
target/arm: Move DBGDIDR into ARMISARegisters
We're going to want to read the DBGDIDR register from KVM in
a subsequent commit, which means it needs to be in the
ARMISARegisters sub-struct. Move it.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20200214175116.9164-12-peter.maydell@linaro.org
Diffstat (limited to 'target/arm/cpu.h')
-rw-r--r-- | target/arm/cpu.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/target/arm/cpu.h b/target/arm/cpu.h index 0f21b6ed80..3c996db3e4 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -866,6 +866,7 @@ struct ARMCPU { uint32_t mvfr1; uint32_t mvfr2; uint32_t id_dfr0; + uint32_t dbgdidr; uint64_t id_aa64isar0; uint64_t id_aa64isar1; uint64_t id_aa64pfr0; @@ -893,7 +894,6 @@ struct ARMCPU { uint32_t id_mmfr4; uint64_t id_aa64afr0; uint64_t id_aa64afr1; - uint32_t dbgdidr; uint32_t clidr; uint64_t mp_affinity; /* MP ID without feature bits */ /* The elements of this array are the CCSIDR values for each cache, |