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| author | Peter Maydell | 2017-09-07 14:54:53 +0200 |
|---|---|---|
| committer | Peter Maydell | 2017-09-07 14:54:53 +0200 |
| commit | 45db7ba681ede57113a67499840e69ee586bcdf2 (patch) | |
| tree | c64a2287d6a908a6cc13cd649bdaf2a9991ab351 /target/arm/cpu.h | |
| parent | nvic: Add NS alias SCS region (diff) | |
| download | qemu-45db7ba681ede57113a67499840e69ee586bcdf2.tar.gz qemu-45db7ba681ede57113a67499840e69ee586bcdf2.tar.xz qemu-45db7ba681ede57113a67499840e69ee586bcdf2.zip | |
target/arm: Make VTOR register banked for v8M
Make the VTOR register banked if v8M security extensions are enabled.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 1503414539-28762-12-git-send-email-peter.maydell@linaro.org
Diffstat (limited to 'target/arm/cpu.h')
| -rw-r--r-- | target/arm/cpu.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/target/arm/cpu.h b/target/arm/cpu.h index 1d9eb369cc..cf2331d234 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -420,7 +420,7 @@ typedef struct CPUARMState { struct { uint32_t other_sp; - uint32_t vecbase; + uint32_t vecbase[2]; uint32_t basepri[2]; uint32_t control[2]; uint32_t ccr; /* Configuration and Control */ |