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| author | Andrew Jones | 2019-08-02 14:25:31 +0200 |
|---|---|---|
| committer | Peter Maydell | 2019-08-16 15:02:51 +0200 |
| commit | 46417784d21c89446763f2047228977bdc267895 (patch) | |
| tree | 60b4e04fbd72c024caea53d921fdecb114032578 /target/arm/cpu.h | |
| parent | target/arm/helper: zcr: Add build bug next to value range assumption (diff) | |
| download | qemu-46417784d21c89446763f2047228977bdc267895.tar.gz qemu-46417784d21c89446763f2047228977bdc267895.tar.xz qemu-46417784d21c89446763f2047228977bdc267895.zip | |
target/arm/cpu: Use div-round-up to determine predicate register array size
Unless we're guaranteed to always increase ARM_MAX_VQ by a multiple of
four, then we should use DIV_ROUND_UP to ensure we get an appropriate
array size.
Signed-off-by: Andrew Jones <drjones@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target/arm/cpu.h')
| -rw-r--r-- | target/arm/cpu.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/target/arm/cpu.h b/target/arm/cpu.h index d12c746085..ab5d58a9d4 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -195,7 +195,7 @@ typedef struct ARMVectorReg { #ifdef TARGET_AARCH64 /* In AArch32 mode, predicate registers do not exist at all. */ typedef struct ARMPredicateReg { - uint64_t p[2 * ARM_MAX_VQ / 8] QEMU_ALIGNED(16); + uint64_t p[DIV_ROUND_UP(2 * ARM_MAX_VQ, 8)] QEMU_ALIGNED(16); } ARMPredicateReg; /* In AArch32 mode, PAC keys do not exist at all. */ |