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| author | Richard Henderson | 2019-01-21 11:23:12 +0100 |
|---|---|---|
| committer | Peter Maydell | 2019-01-21 11:38:54 +0100 |
| commit | 50494a279dab22a015aba9501a94fcc3cd52140e (patch) | |
| tree | 0a2d2ab7d036d1c21606e7399ba04440eff54e19 /target/arm/cpu.h | |
| parent | target/arm: Move cpu_mmu_index out of line (diff) | |
| download | qemu-50494a279dab22a015aba9501a94fcc3cd52140e.tar.gz qemu-50494a279dab22a015aba9501a94fcc3cd52140e.tar.xz qemu-50494a279dab22a015aba9501a94fcc3cd52140e.zip | |
target/arm: Introduce arm_mmu_idx
The pattern
ARMMMUIdx mmu_idx = core_to_arm_mmu_idx(env, cpu_mmu_index(env, false));
is computing the full ARMMMUIdx, stripping off the ARM bits,
and then putting them back.
Avoid the extra two steps with the appropriate helper function.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20190108223129.5570-17-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target/arm/cpu.h')
| -rw-r--r-- | target/arm/cpu.h | 9 |
1 files changed, 8 insertions, 1 deletions
diff --git a/target/arm/cpu.h b/target/arm/cpu.h index 519bafa3c3..e47d5374a8 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -2749,7 +2749,14 @@ ARMMMUIdx arm_v7m_mmu_idx_for_secstate_and_priv(CPUARMState *env, /* Return the MMU index for a v7M CPU in the specified security state */ ARMMMUIdx arm_v7m_mmu_idx_for_secstate(CPUARMState *env, bool secstate); -/* Determine the current mmu_idx to use for normal loads/stores */ +/** + * cpu_mmu_index: + * @env: The cpu environment + * @ifetch: True for code access, false for data access. + * + * Return the core mmu index for the current translation regime. + * This function is used by generic TCG code paths. + */ int cpu_mmu_index(CPUARMState *env, bool ifetch); /* Indexes used when registering address spaces with cpu_address_space_init */ |