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| author | Peter Maydell | 2020-02-24 18:28:44 +0100 |
|---|---|---|
| committer | Peter Maydell | 2020-02-28 17:14:57 +0100 |
| commit | 54117b90ffd8a3977917971c3bd99bb5242710d9 (patch) | |
| tree | d16305820a87ab9b6a85e253382d84ece2931a1a /target/arm/cpu.h | |
| parent | tests/acceptance/integratorcp: Verify Tux is displayed on framebuffer (diff) | |
| download | qemu-54117b90ffd8a3977917971c3bd99bb5242710d9.tar.gz qemu-54117b90ffd8a3977917971c3bd99bb5242710d9.tar.xz qemu-54117b90ffd8a3977917971c3bd99bb5242710d9.zip | |
target/arm: Fix wrong use of FIELD_EX32 on ID_AA64DFR0
We missed an instance of using FIELD_EX32 on a 64-bit ID
register, in isar_feature_aa64_pmu_8_4(). Fix it.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20200224172846.13053-2-peter.maydell@linaro.org
Diffstat (limited to 'target/arm/cpu.h')
| -rw-r--r-- | target/arm/cpu.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/target/arm/cpu.h b/target/arm/cpu.h index 05aa9711cd..6013287f62 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -3770,8 +3770,8 @@ static inline bool isar_feature_aa64_pmu_8_1(const ARMISARegisters *id) static inline bool isar_feature_aa64_pmu_8_4(const ARMISARegisters *id) { - return FIELD_EX32(id->id_aa64dfr0, ID_AA64DFR0, PMUVER) >= 5 && - FIELD_EX32(id->id_aa64dfr0, ID_AA64DFR0, PMUVER) != 0xf; + return FIELD_EX64(id->id_aa64dfr0, ID_AA64DFR0, PMUVER) >= 5 && + FIELD_EX64(id->id_aa64dfr0, ID_AA64DFR0, PMUVER) != 0xf; } /* |