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| author | Peter Maydell | 2017-01-27 16:20:24 +0100 |
|---|---|---|
| committer | Peter Maydell | 2017-01-27 16:29:08 +0100 |
| commit | 7517748e3f71a3099e57915fba95c4c308e6d842 (patch) | |
| tree | c575fc1e87c83fffe1815a504e55542c98dda800 /target/arm/cpu.h | |
| parent | armv7m: set CFSR.UNDEFINSTR on undefined instructions (diff) | |
| download | qemu-7517748e3f71a3099e57915fba95c4c308e6d842.tar.gz qemu-7517748e3f71a3099e57915fba95c4c308e6d842.tar.xz qemu-7517748e3f71a3099e57915fba95c4c308e6d842.zip | |
armv7m: Report no-coprocessor faults correctly
For v7M attempts to access a nonexistent coprocessor are reported
differently from plain undefined instructions (as UsageFaults of type
NOCP rather than type UNDEFINSTR). Split them out into a new
EXCP_NOCP so we can report the FSR value correctly.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Message-id: 1485285380-10565-8-git-send-email-peter.maydell@linaro.org
Diffstat (limited to 'target/arm/cpu.h')
| -rw-r--r-- | target/arm/cpu.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/target/arm/cpu.h b/target/arm/cpu.h index 4b062d20f3..39bff86daf 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -53,6 +53,7 @@ #define EXCP_VIRQ 14 #define EXCP_VFIQ 15 #define EXCP_SEMIHOST 16 /* semihosting call */ +#define EXCP_NOCP 17 /* v7M NOCP UsageFault */ #define ARMV7M_EXCP_RESET 1 #define ARMV7M_EXCP_NMI 2 |