diff options
| author | Peter Maydell | 2020-11-19 22:56:12 +0100 |
|---|---|---|
| committer | Peter Maydell | 2020-12-10 12:44:56 +0100 |
| commit | 7f484147369080d36c411c4ba969f90d025aed55 (patch) | |
| tree | a03e104d575c8ca9411b98b3a6768a755be02b00 /target/arm/cpu.h | |
| parent | hw/intc/armv7m_nvic: Support v8.1M CCR.TRD bit (diff) | |
| download | qemu-7f484147369080d36c411c4ba969f90d025aed55.tar.gz qemu-7f484147369080d36c411c4ba969f90d025aed55.tar.xz qemu-7f484147369080d36c411c4ba969f90d025aed55.zip | |
target/arm: Implement CCR_S.TRD behaviour for SG insns
v8.1M introduces a new TRD flag in the CCR register, which enables
checking for stack frame integrity signatures on SG instructions.
Add the code in the SG insn implementation for the new behaviour.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20201119215617.29887-24-peter.maydell@linaro.org
Diffstat (limited to 'target/arm/cpu.h')
0 files changed, 0 insertions, 0 deletions