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| author | Andrew Jones | 2019-10-31 15:27:34 +0100 |
|---|---|---|
| committer | Peter Maydell | 2019-11-01 21:40:59 +0100 |
| commit | 87014c6b3660ce54a57cb72171d6f93306b0c44a (patch) | |
| tree | b6d4c629d56e000b1245ca7f47db35128367d051 /target/arm/cpu.h | |
| parent | target/arm/cpu64: max cpu: Support sve properties with KVM (diff) | |
| download | qemu-87014c6b3660ce54a57cb72171d6f93306b0c44a.tar.gz qemu-87014c6b3660ce54a57cb72171d6f93306b0c44a.tar.xz qemu-87014c6b3660ce54a57cb72171d6f93306b0c44a.zip | |
target/arm/kvm: host cpu: Add support for sve<N> properties
Allow cpu 'host' to enable SVE when it's available, unless the
user chooses to disable it with the added 'sve=off' cpu property.
Also give the user the ability to select vector lengths with the
sve<N> properties. We don't adopt 'max' cpu's other sve property,
sve-max-vq, because that property is difficult to use with KVM.
That property assumes all vector lengths in the range from 1 up
to and including the specified maximum length are supported, but
there may be optional lengths not supported by the host in that
range. With KVM one must be more specific when enabling vector
lengths.
Signed-off-by: Andrew Jones <drjones@redhat.com>
Reviewed-by: Eric Auger <eric.auger@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Tested-by: Masayoshi Mizuma <m.mizuma@jp.fujitsu.com>
Message-id: 20191031142734.8590-10-drjones@redhat.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target/arm/cpu.h')
| -rw-r--r-- | target/arm/cpu.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/target/arm/cpu.h b/target/arm/cpu.h index a044d6028b..e1a66a2d1c 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -977,11 +977,13 @@ int aarch64_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg); void aarch64_sve_narrow_vq(CPUARMState *env, unsigned vq); void aarch64_sve_change_el(CPUARMState *env, int old_el, int new_el, bool el0_a64); +void aarch64_add_sve_properties(Object *obj); #else static inline void aarch64_sve_narrow_vq(CPUARMState *env, unsigned vq) { } static inline void aarch64_sve_change_el(CPUARMState *env, int o, int n, bool a) { } +static inline void aarch64_add_sve_properties(Object *obj) { } #endif #if !defined(CONFIG_TCG) |