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| author | Richard Henderson | 2020-06-26 05:31:41 +0200 |
|---|---|---|
| committer | Peter Maydell | 2020-06-26 15:31:12 +0200 |
| commit | 8bce44a2f6beb388a3f157652b46e99929839a96 (patch) | |
| tree | 186c0cb81cc037edaef6ab8cc6af1bcbb1b95330 /target/arm/cpu.h | |
| parent | target/arm: Cache the Tagged bit for a page in MemTxAttrs (diff) | |
| download | qemu-8bce44a2f6beb388a3f157652b46e99929839a96.tar.gz qemu-8bce44a2f6beb388a3f157652b46e99929839a96.tar.xz qemu-8bce44a2f6beb388a3f157652b46e99929839a96.zip | |
target/arm: Create tagged ram when MTE is enabled
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20200626033144.790098-44-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target/arm/cpu.h')
| -rw-r--r-- | target/arm/cpu.h | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/target/arm/cpu.h b/target/arm/cpu.h index 513c38970c..cf99dcca9f 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -792,6 +792,10 @@ struct ARMCPU { /* MemoryRegion to use for secure physical accesses */ MemoryRegion *secure_memory; + /* MemoryRegion to use for allocation tag accesses */ + MemoryRegion *tag_memory; + MemoryRegion *secure_tag_memory; + /* For v8M, pointer to the IDAU interface provided by board/SoC */ Object *idau; @@ -2985,6 +2989,8 @@ typedef enum ARMMMUIdxBit { typedef enum ARMASIdx { ARMASIdx_NS = 0, ARMASIdx_S = 1, + ARMASIdx_TagNS = 2, + ARMASIdx_TagS = 3, } ARMASIdx; /* Return the Exception Level targeted by debug exceptions. */ |