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| author | Peter Maydell | 2020-10-19 17:12:56 +0200 |
|---|---|---|
| committer | Peter Maydell | 2020-10-20 17:12:01 +0200 |
| commit | 920f04fa3ea789f8f85a52cee5395b8887b56cf7 (patch) | |
| tree | 635050ab3df6abb871fc452184d04c3a2ae7a813 /target/arm/cpu.h | |
| parent | target/arm: Make the t32 insn[25:23]=111 group non-overlapping (diff) | |
| download | qemu-920f04fa3ea789f8f85a52cee5395b8887b56cf7.tar.gz qemu-920f04fa3ea789f8f85a52cee5395b8887b56cf7.tar.xz qemu-920f04fa3ea789f8f85a52cee5395b8887b56cf7.zip | |
target/arm: Don't allow BLX imm for M-profile
The BLX immediate insn in the Thumb encoding always performs
a switch from Thumb to Arm state. This would be totally useless
in M-profile which has no Arm decoder, and so the instruction
does not exist at all there. Make the encoding UNDEF for M-profile.
(This part of the encoding space is used for the branch-future
and low-overhead-loop insns in v8.1M.)
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20201019151301.2046-6-peter.maydell@linaro.org
Diffstat (limited to 'target/arm/cpu.h')
0 files changed, 0 insertions, 0 deletions