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| author | Richard Henderson | 2019-03-01 21:04:53 +0100 |
|---|---|---|
| committer | Peter Maydell | 2019-03-05 16:55:07 +0100 |
| commit | 9888bd1e20425dfe4dcca5dcd1ca2fac8e90ad19 (patch) | |
| tree | f0cdc842e6f75974b15cb3b7cd33d0e10332970d /target/arm/cpu.h | |
| parent | target/arm: Split out arm_sctlr (diff) | |
| download | qemu-9888bd1e20425dfe4dcca5dcd1ca2fac8e90ad19.tar.gz qemu-9888bd1e20425dfe4dcca5dcd1ca2fac8e90ad19.tar.xz qemu-9888bd1e20425dfe4dcca5dcd1ca2fac8e90ad19.zip | |
target/arm: Implement ARMv8.0-SB
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20190301200501.16533-3-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target/arm/cpu.h')
| -rw-r--r-- | target/arm/cpu.h | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/target/arm/cpu.h b/target/arm/cpu.h index 67b06bfad0..361e51143c 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -3307,6 +3307,11 @@ static inline bool isar_feature_aa32_fhm(const ARMISARegisters *id) return FIELD_EX32(id->id_isar6, ID_ISAR6, FHM) != 0; } +static inline bool isar_feature_aa32_sb(const ARMISARegisters *id) +{ + return FIELD_EX32(id->id_isar6, ID_ISAR6, SB) != 0; +} + static inline bool isar_feature_aa32_fp16_arith(const ARMISARegisters *id) { /* @@ -3445,6 +3450,11 @@ static inline bool isar_feature_aa64_pauth(const ARMISARegisters *id) FIELD_DP64(0, ID_AA64ISAR1, GPI, 0xf))) != 0; } +static inline bool isar_feature_aa64_sb(const ARMISARegisters *id) +{ + return FIELD_EX64(id->id_aa64isar1, ID_AA64ISAR1, SB) != 0; +} + static inline bool isar_feature_aa64_fp16(const ARMISARegisters *id) { /* We always set the AdvSIMD and FP fields identically wrt FP16. */ |