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| author | Richard Henderson | 2020-02-08 13:58:14 +0100 |
|---|---|---|
| committer | Peter Maydell | 2020-02-13 15:14:54 +0100 |
| commit | 9eeb7a1c9531cb3574bfe2c36eb7624802c3ec00 (patch) | |
| tree | c1bba491d632e547d9b1794aeca75d0a58cbd081 /target/arm/cpu.h | |
| parent | target/arm: Add ID_AA64MMFR2_EL1 (diff) | |
| download | qemu-9eeb7a1c9531cb3574bfe2c36eb7624802c3ec00.tar.gz qemu-9eeb7a1c9531cb3574bfe2c36eb7624802c3ec00.tar.xz qemu-9eeb7a1c9531cb3574bfe2c36eb7624802c3ec00.zip | |
target/arm: Update MSR access to UAO
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20200208125816.14954-19-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target/arm/cpu.h')
| -rw-r--r-- | target/arm/cpu.h | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/target/arm/cpu.h b/target/arm/cpu.h index 71879393c2..e943ffe8a9 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -1253,6 +1253,7 @@ void pmu_init(ARMCPU *cpu); #define PSTATE_IL (1U << 20) #define PSTATE_SS (1U << 21) #define PSTATE_PAN (1U << 22) +#define PSTATE_UAO (1U << 23) #define PSTATE_V (1U << 28) #define PSTATE_C (1U << 29) #define PSTATE_Z (1U << 30) @@ -3642,6 +3643,11 @@ static inline bool isar_feature_aa64_ats1e1(const ARMISARegisters *id) return FIELD_EX64(id->id_aa64mmfr1, ID_AA64MMFR1, PAN) >= 2; } +static inline bool isar_feature_aa64_uao(const ARMISARegisters *id) +{ + return FIELD_EX64(id->id_aa64mmfr2, ID_AA64MMFR2, UAO) != 0; +} + static inline bool isar_feature_aa64_bti(const ARMISARegisters *id) { return FIELD_EX64(id->id_aa64pfr1, ID_AA64PFR1, BT) != 0; |