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| author | Aaron Lindsay | 2019-01-21 11:23:14 +0100 |
|---|---|---|
| committer | Peter Maydell | 2019-01-21 11:38:56 +0100 |
| commit | beceb99c0c1218d0b55cc04ce6ef77579d3416cb (patch) | |
| tree | 1758f46a9882969599f28966cb212ed678c157f3 /target/arm/cpu.h | |
| parent | target/arm: Implement PMOVSSET (diff) | |
| download | qemu-beceb99c0c1218d0b55cc04ce6ef77579d3416cb.tar.gz qemu-beceb99c0c1218d0b55cc04ce6ef77579d3416cb.tar.xz qemu-beceb99c0c1218d0b55cc04ce6ef77579d3416cb.zip | |
target/arm: Define FIELDs for ID_DFR0
This is immediately necessary for the PMUv3 implementation to check
ID_DFR0.PerfMon to enable/disable specific features, but defines the
full complement of fields for possible future use elsewhere.
Signed-off-by: Aaron Lindsay <aaron@os.amperecomputing.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20181211151945.29137-8-aaron@os.amperecomputing.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target/arm/cpu.h')
| -rw-r--r-- | target/arm/cpu.h | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/target/arm/cpu.h b/target/arm/cpu.h index 8c0d26e918..147a285a85 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -1681,6 +1681,15 @@ FIELD(ID_AA64MMFR1, PAN, 20, 4) FIELD(ID_AA64MMFR1, SPECSEI, 24, 4) FIELD(ID_AA64MMFR1, XNX, 28, 4) +FIELD(ID_DFR0, COPDBG, 0, 4) +FIELD(ID_DFR0, COPSDBG, 4, 4) +FIELD(ID_DFR0, MMAPDBG, 8, 4) +FIELD(ID_DFR0, COPTRC, 12, 4) +FIELD(ID_DFR0, MMAPTRC, 16, 4) +FIELD(ID_DFR0, MPROFDBG, 20, 4) +FIELD(ID_DFR0, PERFMON, 24, 4) +FIELD(ID_DFR0, TRACEFILT, 28, 4) + QEMU_BUILD_BUG_ON(ARRAY_SIZE(((ARMCPU *)0)->ccsidr) <= R_V7M_CSSELR_INDEX_MASK); /* If adding a feature bit which corresponds to a Linux ELF |