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| author | Richard Henderson | 2019-03-13 05:57:35 +0100 |
|---|---|---|
| committer | Richard Henderson | 2019-05-22 18:38:54 +0200 |
| commit | de390645675966cce113bf5394445bc1f8d07c85 (patch) | |
| tree | d938cb7b20f6855c4bf3bee2163a69010ad8dab3 /target/arm/cpu.h | |
| parent | target/arm: Put all PAC keys into a structure (diff) | |
| download | qemu-de390645675966cce113bf5394445bc1f8d07c85.tar.gz qemu-de390645675966cce113bf5394445bc1f8d07c85.tar.xz qemu-de390645675966cce113bf5394445bc1f8d07c85.zip | |
target/arm: Implement ARMv8.5-RNG
Use the newly introduced infrastructure for guest random numbers.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'target/arm/cpu.h')
| -rw-r--r-- | target/arm/cpu.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/target/arm/cpu.h b/target/arm/cpu.h index 892f9a4ad2..c34207611b 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -3521,6 +3521,11 @@ static inline bool isar_feature_aa64_condm_5(const ARMISARegisters *id) return FIELD_EX64(id->id_aa64isar0, ID_AA64ISAR0, TS) >= 2; } +static inline bool isar_feature_aa64_rndr(const ARMISARegisters *id) +{ + return FIELD_EX64(id->id_aa64isar0, ID_AA64ISAR0, RNDR) != 0; +} + static inline bool isar_feature_aa64_jscvt(const ARMISARegisters *id) { return FIELD_EX64(id->id_aa64isar1, ID_AA64ISAR1, JSCVT) != 0; |