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| author | Richard Henderson | 2020-06-26 05:31:37 +0200 |
|---|---|---|
| committer | Peter Maydell | 2020-06-26 15:31:12 +0200 |
| commit | eb821168db798302bd124a3b000cebc23bd0a395 (patch) | |
| tree | 45b09bdd604366e170b7d18f084242a80a1edc25 /target/arm/cpu.h | |
| parent | target/arm: Complete TBI clearing for user-only for SVE (diff) | |
| download | qemu-eb821168db798302bd124a3b000cebc23bd0a395.tar.gz qemu-eb821168db798302bd124a3b000cebc23bd0a395.tar.xz qemu-eb821168db798302bd124a3b000cebc23bd0a395.zip | |
target/arm: Implement data cache set allocation tags
This is DC GVA and DC GZVA, and the tag check for DC ZVA.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20200626033144.790098-40-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target/arm/cpu.h')
| -rw-r--r-- | target/arm/cpu.h | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/target/arm/cpu.h b/target/arm/cpu.h index 3bf0518ca4..513c38970c 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -2360,7 +2360,9 @@ static inline uint64_t cpreg_to_kvm_id(uint32_t cpregid) #define ARM_CP_NZCV (ARM_CP_SPECIAL | 0x0300) #define ARM_CP_CURRENTEL (ARM_CP_SPECIAL | 0x0400) #define ARM_CP_DC_ZVA (ARM_CP_SPECIAL | 0x0500) -#define ARM_LAST_SPECIAL ARM_CP_DC_ZVA +#define ARM_CP_DC_GVA (ARM_CP_SPECIAL | 0x0600) +#define ARM_CP_DC_GZVA (ARM_CP_SPECIAL | 0x0700) +#define ARM_LAST_SPECIAL ARM_CP_DC_GZVA #define ARM_CP_FPU 0x1000 #define ARM_CP_SVE 0x2000 #define ARM_CP_NO_GDB 0x4000 |