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author | Alistair Francis | 2018-03-09 18:09:43 +0100 |
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committer | Peter Maydell | 2018-03-09 18:09:43 +0100 |
commit | f9a697112ee64180354f98309a5d6b691cc8699d (patch) | |
tree | 00680529bed683a45c50eb78209affdf7e787748 /target/arm/cpu.h | |
parent | memory: fix flatview_access_valid RCU read lock/unlock imbalance (diff) | |
download | qemu-f9a697112ee64180354f98309a5d6b691cc8699d.tar.gz qemu-f9a697112ee64180354f98309a5d6b691cc8699d.tar.xz qemu-f9a697112ee64180354f98309a5d6b691cc8699d.zip |
target/arm: Add a core count property
The cortex A53 TRM specifies that bits 24 and 25 of the L2CTLR register
specify the number of cores in the processor, not the total number of
cores in the system. To report this correctly on machines with multiple
CPU clusters (ARM's big.LITTLE or Xilinx's ZynqMP) we need to allow
the machine to overwrite this value. To do this let's add an optional
property.
Signed-off-by: Alistair Francis <alistair.francis@xilinx.com>
Message-id: ef01d95c0759e88f47f22d11b14c91512a658b4f.1520018138.git.alistair.francis@xilinx.com
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target/arm/cpu.h')
-rw-r--r-- | target/arm/cpu.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/target/arm/cpu.h b/target/arm/cpu.h index 8dd6b788df..3fa8fdad21 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -745,6 +745,11 @@ struct ARMCPU { /* Uniprocessor system with MP extensions */ bool mp_is_up; + /* Specify the number of cores in this CPU cluster. Used for the L2CTLR + * register. + */ + int32_t core_count; + /* The instance init functions for implementation-specific subclasses * set these fields to specify the implementation-dependent values of * various constant registers and reset values of non-constant |