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| author | Peter Maydell | 2019-04-29 18:36:02 +0200 |
|---|---|---|
| committer | Peter Maydell | 2019-04-29 18:36:02 +0200 |
| commit | fa6252a988dbe440cd6087bf93cbe0887f0c401b (patch) | |
| tree | 580fb5821257f61e4090b63bed219fefa8f79913 /target/arm/cpu.h | |
| parent | target/arm: Activate M-profile floating point context when FPCCR.ASPEN is set (diff) | |
| download | qemu-fa6252a988dbe440cd6087bf93cbe0887f0c401b.tar.gz qemu-fa6252a988dbe440cd6087bf93cbe0887f0c401b.tar.xz qemu-fa6252a988dbe440cd6087bf93cbe0887f0c401b.zip | |
target/arm: New helper function arm_v7m_mmu_idx_all()
Add a new helper function which returns the MMU index to use
for v7M, where the caller specifies all of the security
state, privilege level and whether the execution priority
is negative, and reimplement the existing
arm_v7m_mmu_idx_for_secstate_and_priv() in terms of it.
We are going to need this for the lazy-FP-stacking code.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20190416125744.27770-21-peter.maydell@linaro.org
Diffstat (limited to 'target/arm/cpu.h')
| -rw-r--r-- | target/arm/cpu.h | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/target/arm/cpu.h b/target/arm/cpu.h index d4996a4d20..920cf36702 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -2911,6 +2911,13 @@ static inline int arm_mmu_idx_to_el(ARMMMUIdx mmu_idx) } } +/* + * Return the MMU index for a v7M CPU with all relevant information + * manually specified. + */ +ARMMMUIdx arm_v7m_mmu_idx_all(CPUARMState *env, + bool secstate, bool priv, bool negpri); + /* Return the MMU index for a v7M CPU in the specified security and * privilege state. */ |