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| author | Richard Henderson | 2020-03-05 17:09:20 +0100 |
|---|---|---|
| committer | Peter Maydell | 2020-03-05 17:09:20 +0100 |
| commit | fb901c905dc34254f3edfbee86143460594c564b (patch) | |
| tree | 5deaaf33420fbf48eb48df794fdf04854954f89e /target/arm/cpu.h | |
| parent | target/arm: Replicate TBI/TBID bits for single range regimes (diff) | |
| download | qemu-fb901c905dc34254f3edfbee86143460594c564b.tar.gz qemu-fb901c905dc34254f3edfbee86143460594c564b.tar.xz qemu-fb901c905dc34254f3edfbee86143460594c564b.zip | |
target/arm: Optimize cpu_mmu_index
We now cache the core mmu_idx in env->hflags. Rather than recompute
from scratch, extract the field. All of the uses of cpu_mmu_index
within target/arm are within helpers, and env->hflags is always stable
within a translation block from whence helpers are called.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20200302175829.2183-3-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target/arm/cpu.h')
| -rw-r--r-- | target/arm/cpu.h | 23 |
1 files changed, 13 insertions, 10 deletions
diff --git a/target/arm/cpu.h b/target/arm/cpu.h index 0ae07a72e4..4ffd991b6f 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -2943,16 +2943,6 @@ typedef enum ARMMMUIdxBit { #define MMU_USER_IDX 0 -/** - * cpu_mmu_index: - * @env: The cpu environment - * @ifetch: True for code access, false for data access. - * - * Return the core mmu index for the current translation regime. - * This function is used by generic TCG code paths. - */ -int cpu_mmu_index(CPUARMState *env, bool ifetch); - /* Indexes used when registering address spaces with cpu_address_space_init */ typedef enum ARMASIdx { ARMASIdx_NS = 0, @@ -3232,6 +3222,19 @@ FIELD(TBFLAG_A64, BTYPE, 10, 2) /* Not cached. */ FIELD(TBFLAG_A64, TBID, 12, 2) FIELD(TBFLAG_A64, UNPRIV, 14, 1) +/** + * cpu_mmu_index: + * @env: The cpu environment + * @ifetch: True for code access, false for data access. + * + * Return the core mmu index for the current translation regime. + * This function is used by generic TCG code paths. + */ +static inline int cpu_mmu_index(CPUARMState *env, bool ifetch) +{ + return FIELD_EX32(env->hflags, TBFLAG_ANY, MMUIDX); +} + static inline bool bswap_code(bool sctlr_b) { #ifdef CONFIG_USER_ONLY |