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| author | Frédéric Pétrot | 2022-01-06 22:00:51 +0100 |
|---|---|---|
| committer | Alistair Francis | 2022-01-08 06:46:10 +0100 |
| commit | fc313c64345453c7a668d765610dfd7135e21a98 (patch) | |
| tree | 336a2b0e28691f2333931bf366f85e70e60f3091 /target/arm/helper-a64.c | |
| parent | target/riscv: Fix position of 'experimental' comment (diff) | |
| download | qemu-fc313c64345453c7a668d765610dfd7135e21a98.tar.gz qemu-fc313c64345453c7a668d765610dfd7135e21a98.tar.xz qemu-fc313c64345453c7a668d765610dfd7135e21a98.zip | |
exec/memop: Adding signedness to quad definitions
Renaming defines for quad in their various forms so that their signedness is
now explicit.
Done using git grep as suggested by Philippe, with a bit of hand edition to
keep assignments aligned.
Signed-off-by: Frédéric Pétrot <frederic.petrot@univ-grenoble-alpes.fr>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-id: 20220106210108.138226-2-frederic.petrot@univ-grenoble-alpes.fr
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'target/arm/helper-a64.c')
| -rw-r--r-- | target/arm/helper-a64.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/target/arm/helper-a64.c b/target/arm/helper-a64.c index 5ae2ecb0f3..d6a6fd73d9 100644 --- a/target/arm/helper-a64.c +++ b/target/arm/helper-a64.c @@ -513,8 +513,8 @@ uint64_t HELPER(paired_cmpxchg64_le)(CPUARMState *env, uint64_t addr, uint64_t o0, o1; bool success; int mem_idx = cpu_mmu_index(env, false); - MemOpIdx oi0 = make_memop_idx(MO_LEQ | MO_ALIGN_16, mem_idx); - MemOpIdx oi1 = make_memop_idx(MO_LEQ, mem_idx); + MemOpIdx oi0 = make_memop_idx(MO_LEUQ | MO_ALIGN_16, mem_idx); + MemOpIdx oi1 = make_memop_idx(MO_LEUQ, mem_idx); o0 = cpu_ldq_le_mmu(env, addr + 0, oi0, ra); o1 = cpu_ldq_le_mmu(env, addr + 8, oi1, ra); @@ -565,8 +565,8 @@ uint64_t HELPER(paired_cmpxchg64_be)(CPUARMState *env, uint64_t addr, uint64_t o0, o1; bool success; int mem_idx = cpu_mmu_index(env, false); - MemOpIdx oi0 = make_memop_idx(MO_BEQ | MO_ALIGN_16, mem_idx); - MemOpIdx oi1 = make_memop_idx(MO_BEQ, mem_idx); + MemOpIdx oi0 = make_memop_idx(MO_BEUQ | MO_ALIGN_16, mem_idx); + MemOpIdx oi1 = make_memop_idx(MO_BEUQ, mem_idx); o1 = cpu_ldq_be_mmu(env, addr + 0, oi0, ra); o0 = cpu_ldq_be_mmu(env, addr + 8, oi1, ra); |