diff options
| author | Richard Henderson | 2019-03-01 21:04:55 +0100 |
|---|---|---|
| committer | Peter Maydell | 2019-03-05 16:55:08 +0100 |
| commit | ff730e9666a716b669ac4a8ca7c521177d1d2b15 (patch) | |
| tree | 2e77ada8f7f17180307dda34c33207d087e79dd7 /target/arm/helper-a64.h | |
| parent | target/arm: Implement ARMv8.0-PredInv (diff) | |
| download | qemu-ff730e9666a716b669ac4a8ca7c521177d1d2b15.tar.gz qemu-ff730e9666a716b669ac4a8ca7c521177d1d2b15.tar.xz qemu-ff730e9666a716b669ac4a8ca7c521177d1d2b15.zip | |
target/arm: Split helper_msr_i_pstate into 3
The EL0+UMA check is unique to DAIF. While SPSel had avoided the
check by nature of already checking EL >= 1, the other post v8.0
extensions to MSR (imm) allow EL0 and do not require UMA. Avoid
the unconditional write to pc and use raise_exception_ra to unwind.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20190301200501.16533-5-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target/arm/helper-a64.h')
| -rw-r--r-- | target/arm/helper-a64.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/target/arm/helper-a64.h b/target/arm/helper-a64.h index aff8d6c9f3..a915c1247f 100644 --- a/target/arm/helper-a64.h +++ b/target/arm/helper-a64.h @@ -19,6 +19,9 @@ DEF_HELPER_FLAGS_2(udiv64, TCG_CALL_NO_RWG_SE, i64, i64, i64) DEF_HELPER_FLAGS_2(sdiv64, TCG_CALL_NO_RWG_SE, s64, s64, s64) DEF_HELPER_FLAGS_1(rbit64, TCG_CALL_NO_RWG_SE, i64, i64) +DEF_HELPER_2(msr_i_spsel, void, env, i32) +DEF_HELPER_2(msr_i_daifset, void, env, i32) +DEF_HELPER_2(msr_i_daifclear, void, env, i32) DEF_HELPER_3(vfp_cmph_a64, i64, f16, f16, ptr) DEF_HELPER_3(vfp_cmpeh_a64, i64, f16, f16, ptr) DEF_HELPER_3(vfp_cmps_a64, i64, f32, f32, ptr) |