diff options
| author | Peter Maydell | 2019-04-29 18:36:00 +0200 |
|---|---|---|
| committer | Peter Maydell | 2019-04-29 18:36:00 +0200 |
| commit | 3cd6726f0ba7cc77342ee721bd86094e13b2a42a (patch) | |
| tree | 03e4731676aed7ba6bdc73175feb39a09e58276e /target/arm/helper.c | |
| parent | target/arm: Implement v7m_update_fpccr() (diff) | |
| download | qemu-3cd6726f0ba7cc77342ee721bd86094e13b2a42a.tar.gz qemu-3cd6726f0ba7cc77342ee721bd86094e13b2a42a.tar.xz qemu-3cd6726f0ba7cc77342ee721bd86094e13b2a42a.zip | |
target/arm: Clear CONTROL.SFPA in BXNS and BLXNS
For v8M floating point support, transitions from Secure
to Non-secure state via BLNS and BLXNS must clear the
CONTROL.SFPA bit. (This corresponds to the pseudocode
BranchToNS() function.)
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20190416125744.27770-13-peter.maydell@linaro.org
Diffstat (limited to 'target/arm/helper.c')
| -rw-r--r-- | target/arm/helper.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/target/arm/helper.c b/target/arm/helper.c index 547898581a..088852ceb9 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -7819,6 +7819,9 @@ void HELPER(v7m_bxns)(CPUARMState *env, uint32_t dest) /* translate.c should have made BXNS UNDEF unless we're secure */ assert(env->v7m.secure); + if (!(dest & 1)) { + env->v7m.control[M_REG_S] &= ~R_V7M_CONTROL_SFPA_MASK; + } switch_v7m_security_state(env, dest & 1); env->thumb = 1; env->regs[15] = dest & ~1; @@ -7876,6 +7879,7 @@ void HELPER(v7m_blxns)(CPUARMState *env, uint32_t dest) */ write_v7m_exception(env, 1); } + env->v7m.control[M_REG_S] &= ~R_V7M_CONTROL_SFPA_MASK; switch_v7m_security_state(env, 0); env->thumb = 1; env->regs[15] = dest; |