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| author | Richard Henderson | 2019-03-01 21:04:55 +0100 |
|---|---|---|
| committer | Peter Maydell | 2019-03-05 16:55:08 +0100 |
| commit | ff730e9666a716b669ac4a8ca7c521177d1d2b15 (patch) | |
| tree | 2e77ada8f7f17180307dda34c33207d087e79dd7 /target/arm/helper.h | |
| parent | target/arm: Implement ARMv8.0-PredInv (diff) | |
| download | qemu-ff730e9666a716b669ac4a8ca7c521177d1d2b15.tar.gz qemu-ff730e9666a716b669ac4a8ca7c521177d1d2b15.tar.xz qemu-ff730e9666a716b669ac4a8ca7c521177d1d2b15.zip | |
target/arm: Split helper_msr_i_pstate into 3
The EL0+UMA check is unique to DAIF. While SPSel had avoided the
check by nature of already checking EL >= 1, the other post v8.0
extensions to MSR (imm) allow EL0 and do not require UMA. Avoid
the unconditional write to pc and use raise_exception_ra to unwind.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20190301200501.16533-5-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target/arm/helper.h')
| -rw-r--r-- | target/arm/helper.h | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/target/arm/helper.h b/target/arm/helper.h index d363904278..6f0f386926 100644 --- a/target/arm/helper.h +++ b/target/arm/helper.h @@ -77,7 +77,6 @@ DEF_HELPER_2(get_cp_reg, i32, env, ptr) DEF_HELPER_3(set_cp_reg64, void, env, ptr, i64) DEF_HELPER_2(get_cp_reg64, i64, env, ptr) -DEF_HELPER_3(msr_i_pstate, void, env, i32, i32) DEF_HELPER_1(clear_pstate_ss, void, env) DEF_HELPER_2(get_r13_banked, i32, env, i32) |