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author | Rémi Denis-Courmont | 2021-01-12 11:44:59 +0100 |
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committer | Peter Maydell | 2021-01-19 15:38:51 +0100 |
commit | 6c85f906261226e87211506bd9f787fd48a09f17 (patch) | |
tree | d239c2ef6363763ccf29a72854ad96533910ca92 /target/arm/internals.h | |
parent | target/arm: Define isar_feature function to test for presence of SEL2 (diff) | |
download | qemu-6c85f906261226e87211506bd9f787fd48a09f17.tar.gz qemu-6c85f906261226e87211506bd9f787fd48a09f17.tar.xz qemu-6c85f906261226e87211506bd9f787fd48a09f17.zip |
target/arm: add 64-bit S-EL2 to EL exception table
With the ARMv8.4-SEL2 extension, EL2 is a legal exception level in
secure mode, though it can only be AArch64.
This patch adds the target EL for exceptions from 64-bit S-EL2.
It also fixes the target EL to EL2 when HCR.{A,F,I}MO are set in secure
mode. Those values were never used in practice as the effective value of
HCR was always 0 in secure mode.
Signed-off-by: Rémi Denis-Courmont <remi.denis.courmont@huawei.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210112104511.36576-7-remi.denis.courmont@huawei.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target/arm/internals.h')
0 files changed, 0 insertions, 0 deletions