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| author | Richard Henderson | 2020-05-08 17:43:59 +0200 |
|---|---|---|
| committer | Peter Maydell | 2020-05-11 12:22:06 +0200 |
| commit | ba080b8682fc6bde7f2d9dedddb519d63cbe138f (patch) | |
| tree | eb76e49e85dcff3cb58e86d7bc0df7b329b17e2c /target/arm/internals.h | |
| parent | target/arm: Reuse sve_probe_page for gather loads (diff) | |
| download | qemu-ba080b8682fc6bde7f2d9dedddb519d63cbe138f.tar.gz qemu-ba080b8682fc6bde7f2d9dedddb519d63cbe138f.tar.xz qemu-ba080b8682fc6bde7f2d9dedddb519d63cbe138f.zip | |
target/arm: Remove sve_memopidx
None of the sve helpers use TCGMemOpIdx any longer, so we can
stop passing it.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20200508154359.7494-20-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target/arm/internals.h')
| -rw-r--r-- | target/arm/internals.h | 5 |
1 files changed, 0 insertions, 5 deletions
diff --git a/target/arm/internals.h b/target/arm/internals.h index e633aff36e..a833e3941d 100644 --- a/target/arm/internals.h +++ b/target/arm/internals.h @@ -979,11 +979,6 @@ static inline int arm_num_ctx_cmps(ARMCPU *cpu) } } -/* Note make_memop_idx reserves 4 bits for mmu_idx, and MO_BSWAP is bit 3. - * Thus a TCGMemOpIdx, without any MO_ALIGN bits, fits in 8 bits. - */ -#define MEMOPIDX_SHIFT 8 - /** * v7m_using_psp: Return true if using process stack pointer * Return true if the CPU is currently using the process stack |