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| author | Peter Maydell | 2017-07-27 12:59:08 +0200 |
|---|---|---|
| committer | Peter Maydell | 2017-07-31 14:09:52 +0200 |
| commit | 8531eb4f614a60e6582d4832b15eee09f7d27874 (patch) | |
| tree | 64f9633ddee4973ae9674cabafa7c6f3472091c9 /target/arm/machine.c | |
| parent | target/arm: Don't allow guest to make System space executable for M profile (diff) | |
| download | qemu-8531eb4f614a60e6582d4832b15eee09f7d27874.tar.gz qemu-8531eb4f614a60e6582d4832b15eee09f7d27874.tar.xz qemu-8531eb4f614a60e6582d4832b15eee09f7d27874.zip | |
target/arm: Rename cp15.c6_rgnr to pmsav7.rnr
Almost all of the PMSAv7 state is in the pmsav7 substruct of
the ARM CPU state structure. The exception is the region
number register, which is in cp15.c6_rgnr. This exception
is a bit odd for M profile, which otherwise generally does
not store state in the cp15 substruct.
Rename cp15.c6_rgnr to pmsav7.rnr accordingly.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-id: 1501153150-19984-4-git-send-email-peter.maydell@linaro.org
Diffstat (limited to 'target/arm/machine.c')
| -rw-r--r-- | target/arm/machine.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/target/arm/machine.c b/target/arm/machine.c index 1a40469015..93c1a78672 100644 --- a/target/arm/machine.c +++ b/target/arm/machine.c @@ -151,7 +151,7 @@ static bool pmsav7_rgnr_vmstate_validate(void *opaque, int version_id) { ARMCPU *cpu = opaque; - return cpu->env.cp15.c6_rgnr < cpu->pmsav7_dregion; + return cpu->env.pmsav7.rnr < cpu->pmsav7_dregion; } static const VMStateDescription vmstate_pmsav7 = { |