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| author | Peter Maydell | 2021-09-13 11:54:38 +0200 |
|---|---|---|
| committer | Peter Maydell | 2021-09-21 17:28:27 +0200 |
| commit | a7789fabe15ee0e0d0f227c287a5c0d01ebcc4b4 (patch) | |
| tree | a2a5b547237d7f43186ae8429f607784f79ce706 /target/arm/machine.c | |
| parent | target/arm: Optimize MVE VSHL, VSHR immediate forms (diff) | |
| download | qemu-a7789fabe15ee0e0d0f227c287a5c0d01ebcc4b4.tar.gz qemu-a7789fabe15ee0e0d0f227c287a5c0d01ebcc4b4.tar.xz qemu-a7789fabe15ee0e0d0f227c287a5c0d01ebcc4b4.zip | |
target/arm: Optimize MVE VSHLL and VMOVL
Optimize the MVE VSHLL insns by using TCG vector ops when possible.
This includes the VMOVL insn, which we handle in mve.decode as "VSHLL
with zero shift count".
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210913095440.13462-11-peter.maydell@linaro.org
Diffstat (limited to 'target/arm/machine.c')
0 files changed, 0 insertions, 0 deletions