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authorPeter Maydell2021-06-17 14:15:45 +0200
committerPeter Maydell2021-06-21 17:49:38 +0200
commit507b6a500c2f0f6cf6182aa69efac4c20eb3e97b (patch)
treec808f16caa45dc0fc5431bdb122c274702b0d17f /target/arm/meson.build
parenttarget/arm: Handle FPU check for FPCXT_NS insns via vfp_access_check_m() (diff)
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target/arm: Implement MVE VLDR/VSTR (non-widening forms)
Implement the forms of the MVE VLDR and VSTR insns which perform non-widening loads of bytes, halfwords or words from memory into vector elements of the same width (encodings T5, T6, T7). (At the moment we know for MVE and M-profile in general that vfp_access_check() can never return false, but we include the conventional return-true-on-failure check for consistency with non-M-profile translation code.) Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20210617121628.20116-2-peter.maydell@linaro.org
Diffstat (limited to 'target/arm/meson.build')
-rw-r--r--target/arm/meson.build1
1 files changed, 1 insertions, 0 deletions
diff --git a/target/arm/meson.build b/target/arm/meson.build
index 2b50be3f86..25a02bf276 100644
--- a/target/arm/meson.build
+++ b/target/arm/meson.build
@@ -23,6 +23,7 @@ arm_ss.add(files(
'helper.c',
'iwmmxt_helper.c',
'm_helper.c',
+ 'mve_helper.c',
'neon_helper.c',
'op_helper.c',
'tlb_helper.c',