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| author | Richard Henderson | 2022-07-08 17:15:09 +0200 |
|---|---|---|
| committer | Peter Maydell | 2022-07-11 14:19:35 +0200 |
| commit | 3ebc26e79d05cf53129e283529cf3bc8a5c5953e (patch) | |
| tree | b5103e59cdeb967e539abbdc4b19b44af7b85820 /target/arm/sme-fa64.decode | |
| parent | target/arm: Mark LDFF1 and LDNF1 as non-streaming (diff) | |
| download | qemu-3ebc26e79d05cf53129e283529cf3bc8a5c5953e.tar.gz qemu-3ebc26e79d05cf53129e283529cf3bc8a5c5953e.tar.xz qemu-3ebc26e79d05cf53129e283529cf3bc8a5c5953e.zip | |
target/arm: Mark LD1RO as non-streaming
Mark these as a non-streaming instructions, which should trap
if full a64 support is not enabled in streaming mode.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220708151540.18136-15-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target/arm/sme-fa64.decode')
| -rw-r--r-- | target/arm/sme-fa64.decode | 3 |
1 files changed, 0 insertions, 3 deletions
diff --git a/target/arm/sme-fa64.decode b/target/arm/sme-fa64.decode index 2b5432bf85..47708ccc8d 100644 --- a/target/arm/sme-fa64.decode +++ b/target/arm/sme-fa64.decode @@ -58,6 +58,3 @@ FAIL 0001 1110 0111 1110 0000 00-- ---- ---- # FJCVTZS # --11 1100 --0- ---- ---- ---- ---- ---- # Load/store FP register (unscaled imm) # --11 1100 --1- ---- ---- ---- ---- --10 # Load/store FP register (register offset) # --11 1101 ---- ---- ---- ---- ---- ---- # Load/store FP register (scaled imm) - -FAIL 1010 010- -01- ---- 000- ---- ---- ---- # SVE load & replicate 32 bytes (scalar+scalar) -FAIL 1010 010- -010 ---- 001- ---- ---- ---- # SVE load & replicate 32 bytes (scalar+imm) |