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authorRichard Henderson2022-07-08 17:15:03 +0200
committerPeter Maydell2022-07-11 14:19:35 +0200
commit7272e98a748041118437c8aedcdd4f68838d4869 (patch)
tree3cf7ef1add96d6acf9f9b28a2481a93f4fdd2f40 /target/arm/sme-fa64.decode
parenttarget/arm: Mark PMULL, FMMLA as non-streaming (diff)
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target/arm: Mark FTSMUL, FTMAD, FADDA as non-streaming
Mark these as a non-streaming instructions, which should trap if full a64 support is not enabled in streaming mode. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20220708151540.18136-9-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target/arm/sme-fa64.decode')
-rw-r--r--target/arm/sme-fa64.decode3
1 files changed, 0 insertions, 3 deletions
diff --git a/target/arm/sme-fa64.decode b/target/arm/sme-fa64.decode
index 4ff2df82e5..b5eaa2d0fa 100644
--- a/target/arm/sme-fa64.decode
+++ b/target/arm/sme-fa64.decode
@@ -59,9 +59,6 @@ FAIL 0001 1110 0111 1110 0000 00-- ---- ---- # FJCVTZS
# --11 1100 --1- ---- ---- ---- ---- --10 # Load/store FP register (register offset)
# --11 1101 ---- ---- ---- ---- ---- ---- # Load/store FP register (scaled imm)
-FAIL 0110 0101 --0- ---- 0000 11-- ---- ---- # FTSMUL
-FAIL 0110 0101 --01 0--- 100- ---- ---- ---- # FTMAD
-FAIL 0110 0101 --01 1--- 001- ---- ---- ---- # FADDA
FAIL 0100 0101 --0- ---- 1001 10-- ---- ---- # SMMLA, UMMLA, USMMLA
FAIL 0100 0101 --1- ---- 1--- ---- ---- ---- # SVE2 string/histo/crypto instructions
FAIL 1000 010- -00- ---- 10-- ---- ---- ---- # SVE2 32-bit gather NT load (vector+scalar)