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| author | Richard Henderson | 2021-05-25 03:02:41 +0200 |
|---|---|---|
| committer | Peter Maydell | 2021-05-25 17:01:43 +0200 |
| commit | 4269fef1f901927dd2c56deea6c45da8e8c5170e (patch) | |
| tree | 51f27052cf0a70f56d4df6f0a0d4440596021436 /target/arm/sve.decode | |
| parent | target/arm: Implement SVE2 PMULLB, PMULLT (diff) | |
| download | qemu-4269fef1f901927dd2c56deea6c45da8e8c5170e.tar.gz qemu-4269fef1f901927dd2c56deea6c45da8e8c5170e.tar.xz qemu-4269fef1f901927dd2c56deea6c45da8e8c5170e.zip | |
target/arm: Implement SVE2 bitwise shift left long
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210525010358.152808-16-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target/arm/sve.decode')
| -rw-r--r-- | target/arm/sve.decode | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/target/arm/sve.decode b/target/arm/sve.decode index 016c15ebb6..a3191eba7b 100644 --- a/target/arm/sve.decode +++ b/target/arm/sve.decode @@ -1207,3 +1207,11 @@ SMULLB_zzz 01000101 .. 0 ..... 011 100 ..... ..... @rd_rn_rm SMULLT_zzz 01000101 .. 0 ..... 011 101 ..... ..... @rd_rn_rm UMULLB_zzz 01000101 .. 0 ..... 011 110 ..... ..... @rd_rn_rm UMULLT_zzz 01000101 .. 0 ..... 011 111 ..... ..... @rd_rn_rm + +## SVE2 bitwise shift left long + +# Note bit23 == 0 is handled by esz > 0 in do_sve2_shll_tb. +SSHLLB 01000101 .. 0 ..... 1010 00 ..... ..... @rd_rn_tszimm_shl +SSHLLT 01000101 .. 0 ..... 1010 01 ..... ..... @rd_rn_tszimm_shl +USHLLB 01000101 .. 0 ..... 1010 10 ..... ..... @rd_rn_tszimm_shl +USHLLT 01000101 .. 0 ..... 1010 11 ..... ..... @rd_rn_tszimm_shl |