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| author | Richard Henderson | 2022-04-26 18:30:01 +0200 |
|---|---|---|
| committer | Peter Maydell | 2022-04-28 14:35:57 +0200 |
| commit | 181115d906bf31cf3db724a4cd45e63c4146a23f (patch) | |
| tree | b2cf8bf8b80d6e981d2ccd249b4a9b7985d7c0a6 /target/arm/translate-a64.c | |
| parent | target/arm: Use tcg_constant in gen_adc_CC (diff) | |
| download | qemu-181115d906bf31cf3db724a4cd45e63c4146a23f.tar.gz qemu-181115d906bf31cf3db724a4cd45e63c4146a23f.tar.xz qemu-181115d906bf31cf3db724a4cd45e63c4146a23f.zip | |
target/arm: Use tcg_constant in handle_msr_i
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20220426163043.100432-6-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target/arm/translate-a64.c')
| -rw-r--r-- | target/arm/translate-a64.c | 13 |
1 files changed, 3 insertions, 10 deletions
diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index 5c0fd897d6..ec4765362b 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -1615,7 +1615,6 @@ static void gen_axflag(void) static void handle_msr_i(DisasContext *s, uint32_t insn, unsigned int op1, unsigned int op2, unsigned int crm) { - TCGv_i32 t1; int op = op1 << 3 | op2; /* End the TB by default, chaining is ok. */ @@ -1674,9 +1673,7 @@ static void handle_msr_i(DisasContext *s, uint32_t insn, if (s->current_el == 0) { goto do_unallocated; } - t1 = tcg_const_i32(crm & PSTATE_SP); - gen_helper_msr_i_spsel(cpu_env, t1); - tcg_temp_free_i32(t1); + gen_helper_msr_i_spsel(cpu_env, tcg_constant_i32(crm & PSTATE_SP)); break; case 0x19: /* SSBS */ @@ -1704,15 +1701,11 @@ static void handle_msr_i(DisasContext *s, uint32_t insn, break; case 0x1e: /* DAIFSet */ - t1 = tcg_const_i32(crm); - gen_helper_msr_i_daifset(cpu_env, t1); - tcg_temp_free_i32(t1); + gen_helper_msr_i_daifset(cpu_env, tcg_constant_i32(crm)); break; case 0x1f: /* DAIFClear */ - t1 = tcg_const_i32(crm); - gen_helper_msr_i_daifclear(cpu_env, t1); - tcg_temp_free_i32(t1); + gen_helper_msr_i_daifclear(cpu_env, tcg_constant_i32(crm)); /* For DAIFClear, exit the cpu loop to re-evaluate pending IRQs. */ s->base.is_jmp = DISAS_UPDATE_EXIT; break; |