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authorRichard Henderson2021-11-03 05:03:47 +0100
committerPeter Maydell2021-12-15 11:35:26 +0100
commit485088f7425ec7f99d3f21cafb028aa92639618d (patch)
tree3a3bb036fe831919869b4553cae70fca875597c6 /target/arm/translate-a64.c
parenttarget/arm: Split arm_pre_translate_insn (diff)
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target/arm: Advance pc for arch single-step exception
The size of the code covered by a TranslationBlock cannot be 0; this is checked via assert in tb_gen_code. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target/arm/translate-a64.c')
-rw-r--r--target/arm/translate-a64.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
index 9c4258ccac..2986fe1393 100644
--- a/target/arm/translate-a64.c
+++ b/target/arm/translate-a64.c
@@ -14767,6 +14767,7 @@ static void aarch64_tr_translate_insn(DisasContextBase *dcbase, CPUState *cpu)
assert(s->base.num_insns == 1);
gen_swstep_exception(s, 0, 0);
s->base.is_jmp = DISAS_NORETURN;
+ s->base.pc_next = pc + 4;
return;
}