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| author | Alex Bennée | 2018-03-01 12:05:52 +0100 |
|---|---|---|
| committer | Peter Maydell | 2018-03-01 12:13:59 +0100 |
| commit | 6089030c7322d8f96b54fb9904e53b0f464bb8fe (patch) | |
| tree | c24eff10ae27383bf77b94fe9bca50c4f8b286d9 /target/arm/translate-a64.c | |
| parent | arm/translate-a64: add FP16 FMULX/MLS/FMLA to simd_indexed (diff) | |
| download | qemu-6089030c7322d8f96b54fb9904e53b0f464bb8fe.tar.gz qemu-6089030c7322d8f96b54fb9904e53b0f464bb8fe.tar.xz qemu-6089030c7322d8f96b54fb9904e53b0f464bb8fe.zip | |
arm/translate-a64: add FP16 x2 ops for simd_indexed
A bunch of the vectorised bitwise operations just operate on larger
chunks at a time. We can do the same for the new half-precision
operations by introducing some TWOHALFOP helpers which work on each
half of a pair of half-precision operations at once.
Hopefully all this hoop jumping will get simpler once we have
generically vectorised helpers here.
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20180227143852.11175-16-alex.bennee@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target/arm/translate-a64.c')
| -rw-r--r-- | target/arm/translate-a64.c | 26 |
1 files changed, 21 insertions, 5 deletions
diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index 6a264bc134..3487c0430f 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -11417,8 +11417,13 @@ static void disas_simd_indexed(DisasContext *s, uint32_t insn) * multiply-add */ tcg_gen_xori_i32(tcg_op, tcg_op, 0x80008000); } - gen_helper_advsimd_muladdh(tcg_res, tcg_op, tcg_idx, - tcg_res, fpst); + if (is_scalar) { + gen_helper_advsimd_muladdh(tcg_res, tcg_op, tcg_idx, + tcg_res, fpst); + } else { + gen_helper_advsimd_muladd2h(tcg_res, tcg_op, tcg_idx, + tcg_res, fpst); + } break; case 2: if (opcode == 0x5) { @@ -11437,10 +11442,21 @@ static void disas_simd_indexed(DisasContext *s, uint32_t insn) switch (size) { case 1: if (u) { - gen_helper_advsimd_mulxh(tcg_res, tcg_op, tcg_idx, - fpst); + if (is_scalar) { + gen_helper_advsimd_mulxh(tcg_res, tcg_op, + tcg_idx, fpst); + } else { + gen_helper_advsimd_mulx2h(tcg_res, tcg_op, + tcg_idx, fpst); + } } else { - g_assert_not_reached(); + if (is_scalar) { + gen_helper_advsimd_mulh(tcg_res, tcg_op, + tcg_idx, fpst); + } else { + gen_helper_advsimd_mul2h(tcg_res, tcg_op, + tcg_idx, fpst); + } } break; case 2: |