diff options
| author | Alex Bennée | 2020-01-31 16:34:39 +0100 |
|---|---|---|
| committer | Peter Maydell | 2020-01-31 17:53:13 +0100 |
| commit | aeab8e5eb220cc5ff84b0b68b9afccc611bf0fcd (patch) | |
| tree | e8e2408524f3cd0e16cd1e30fa2cc0011c738077 /target/arm/translate-a64.c | |
| parent | Merge remote-tracking branch 'remotes/stefanha/tags/block-pull-request' into ... (diff) | |
| download | qemu-aeab8e5eb220cc5ff84b0b68b9afccc611bf0fcd.tar.gz qemu-aeab8e5eb220cc5ff84b0b68b9afccc611bf0fcd.tar.xz qemu-aeab8e5eb220cc5ff84b0b68b9afccc611bf0fcd.zip | |
target/arm: fix TCG leak for fcvt half->double
When support for the AHP flag was added we inexplicably only freed the
new temps in one of the two legs. Move those tcg_temp_free to the same
level as the allocation to fix that leak.
Fixes: 486624fcd3eac
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-id: 20200131153439.26027-1-alex.bennee@linaro.org
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target/arm/translate-a64.c')
| -rw-r--r-- | target/arm/translate-a64.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index 96a5be2b37..766a03335b 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -5778,8 +5778,6 @@ static void handle_fp_fcvt(DisasContext *s, int opcode, TCGv_i32 tcg_rd = tcg_temp_new_i32(); gen_helper_vfp_fcvt_f16_to_f32(tcg_rd, tcg_rn, tcg_fpst, tcg_ahp); write_fp_sreg(s, rd, tcg_rd); - tcg_temp_free_ptr(tcg_fpst); - tcg_temp_free_i32(tcg_ahp); tcg_temp_free_i32(tcg_rd); } else { /* Half to double */ @@ -5789,6 +5787,8 @@ static void handle_fp_fcvt(DisasContext *s, int opcode, tcg_temp_free_i64(tcg_rd); } tcg_temp_free_i32(tcg_rn); + tcg_temp_free_ptr(tcg_fpst); + tcg_temp_free_i32(tcg_ahp); break; } default: |